This invention relates to semiconductor devices and more specifically relates to a power MOSFET device with driver FETs integrated into or copacked with the same package to provide drive current to the gate circuit of the power MOSFET.
Power MOSFETs frequently require a high gate current pulse for their operation. For example, circuits containing control or synchronous power MOSFETs frequently require a high gate pulse current for their operation. As a specific example, high frequency dc to dc converters such as synchronous buck converters are operated in the region of 3 MHz and above, at breakdown voltages of about 30 volts and below. The gate driver current ig for the control and synchronous MOSFETs of those circuits is determined, approximately by:
ig=Qg/tON
For a typical SO-8 packaged device such as the IRF7811W made by the International Rectifier Corporation, the gate charge Qg required to turn on the MOSFET is in the region of 14nC. If the MOSFET turn on time tON is limited to 10 ns, the switching current can therefore be of the order 1.4A. This poses a problem for control ICs where capability to deliver this current level is not economically viable, given manufacturing complexity versus chip area required.
Solving this problem has typically been addressed by the addition of separate driver ICs placed in circuit between the control IC and the MOSFETs. As switching frequencies increase, the layout related circuit efficiency of this approach reduces, and the parasitic inductances caused by the distance between the separate components cause higher losses during switching.
A driver stage is placed inside the MOSFET package, and the driver current requirement can therefore be reduced to that of two small driver FETs. The total active area of these devices is approximately xc2xc that of the main FET/switch. The input drive current will therefore be reduced by similar proportions thereby enabling the driver devices to be driven directly by the control IC, removing the need for discrete driver ICs. In one embodiment of the invention, the internal driver stage uses two separate MOSFET chips in a totem pole configuration. This minimizes the wafer level manufacturing complexity for providing the desired function. The small driver chips can also be integrated with one another, or into the main chip.
The three devices, the main MOSFET and the two smaller driver MOSFETs, when discrete chips, may be copacked in standard small footprint plastic encapsulated packages, such as the well known TSSOP, SOIC, or MLP packages.